As conventional technology, it is disclosed about a technology of providing a semiconductor element with a high breakdown voltage, without forming a thick diffusion layer (for example, refer to Patent Literature 1).
The high breakdown voltage semiconductor device described in Patent Literature 1 has an element region 51 and a junction termination region 52 disposed on the perimeter of the element region 51, as shown in FIG. 1. In the element region 51 and the junction termination region 52, a p type base layer 34 is formed by a diffusion process on a surface of an n type base layer 31 having a high resistivity. A plurality of trenches 35 embedding a gate electrode are formed in the element region 51. A plurality of terminal trenches 55 having a continuous or a discontinuous ring shape are formed in the junction termination region 52, surrounding the element region 51. The terminal trench 55 passes through the p type base layer 34, and has the depth which reaches to the halfway of the n type base layer 31. The p type base layer 34 is divided into a plurality of parts electrically separated by the terminal trench 55, in the junction termination region 52.
In the high breakdown voltage semiconductor device described in Patent Literature 1, as shown in FIG. 1, the depth of each trenches (35, 55) is determined to be larger than the interval between the adjoining trenches (35, 55) (width of the p type base layer 34).    Patent Literature 1: Japanese Patent Application Laying-Open Publication No. H09-283754 (Pages 2-3, and FIG. 1)